The present invention relates to a backplane device for a spatial light modulator and a method for operating a backplane device.
The spatial light modulator is in particular designed to be used in a display device in the form of a high-resolution display which is used for displaying information. The field of application of the invention includes high-resolution displays, in particular TFT (thin film transistor) displays and LCOS (liquid crystal on silicon) which are used for purposes where the pixels are required to be controlled very quickly. Another field of application are optical elements with a spatial light modulator, said elements affecting the direction or shape of a beam of light or the shape of a coherent wave front.
FIG. 26 shows an example of an active matrix (AM) structure of a backplane device according to the prior art comprising four pixel electrodes 11-1, 11-2, 11-3 and 11-4. The gate lines are activated one after the other, to write the pixels of the whole display. However, this type of addressing using global row and column lines as used in conventional display devices proves to be inadequate in conjunction with increasing resolutions and refresh rates as they are required for example for the representation of holograms in holographic displays.
Increasing the frequency on the column lines means that the whole data line must be recharged against the data line resistance and capacity during each clock cycle, see e.g. FIG. 28. This leads to high output driving currents and to high power dissipation. Additionally, the large impedance of a line will be further increased by the gate capacities of all TFTs connected to this line.
The capacitance of the column lines and the gates of all pixel TFTs must be subjected to charge reversals in much shorter intervals. As a consequence, the power loss increases as the frequency rises. There is a limit defined by the impedance and capacitance of the conductor beyond which it is no longer possible to achieve a full charge reversal in the conductor in one clock cycle.
As a result, active-matrix structures used in nearly all today's LCD (Liquid Crystal device) backplane devices are not able to drive high-resolution displays (e.g. 16000 pixels×8000 pixels) at fast frame rates, e.g. in the range of 1000 Hz and more. Displays like that are needed especially for holographic display applications, e.g. like they are disclosed in WO 2006/066919 A1, which is incorporated by reference herewith. The reason why such a high frame rate is needed is especially because virtual observer windows (VOW) might have to be generated in a time sequential manner for one or more observers.
Additionally, the large impedance of a line will be further increased by all the connected TFT gate capacities. The combination of both characteristics limits the maximum data line frequency. As a result, using conventional an active matrix design for high-resolution displays with high frame rates seems to be not feasible.
WO 2009/092717 A1 describes a method to overcome some of the AM problems by tiling the display into small clusters and drive these clusters independently from the outside using analog shift registers. Tiling the display into clusters and using very few but fast point to point connections from the outside drivers to the cluster circuit allow very high resolution and very fast displays. But all these kind of displays assign the pixel value to the pixels line by line sorted by display position. This requires the high voltage analog data-lines or line segments of the shift registers to be recharged at high frequencies, if the pixel value changes from line to line.
This is especially disadvantageous for holographic displays with usually uniformly distributed pixel values over the spatial light modulator. So with these prior art kind of displays a holographic display normally has the same power dissipation as a normal LC display to which the worst case chessboard test pattern pixel values is assigned to the pixels.
Specially developed backplane structures using pixel clusters and analog shift registers—as disclosed e.g. in WO 2009/024523 A1 or in WO 2009/092717 A1—might be difficult to implement with today's LTPS (Low Temperature Polycristalin Silicon) TFTs, because the inhomogenities of the LTPS complicate the implementation of the analog circuits needed for the analog shift registers.